XG-1000CA/CB (Crystal Oscillator Low-Jitter SAW Oscillator)

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Complies with EU RoHS directive. Pb free.
  • ・Output frequency range:50MHz to 170MHz
  • ・Supply voltage
    :1.8V / 2.5V / 3.3V
  • ・Frequency tolerance
    :±50× 10-6, ±100× 10-6
  • ・Output
  • ・Function
    :Output enable (OE)
  • ・Package size
    :CA: 7.0×5.0×1.2mm
    :CB: 5.0×3.2×1.1mm
  • ・Very low jitter and low phase noise by SAW unit.

DataSheet pdf(175KB) / List of frequencies


Item Symbol Specifications Conditions/
Output frequency range *1 f0 50.000MHz to 170.000MHz
75.000MHz, 98.304MHz, 100.000MHz,
106.250MHz, 125.000MHz, 150.000MHz
Supply voltage VCC E:1.8V ±0.1V D:2.5V ±0.125V C:3.3V ±0.3V
T_stg -40°C to +100°C Store as
bare product.
T_use -10°C to +70°C
Frequency tolerance *2 f_tol B:±50 × 10-6 C:±100 × 10-6
Current consumption ICC 20mA Max. 25mA Max. 35mA Max. OE=VCC,
No load condition
Disable current I_dis 15mA Max. 20mA Max. 30mA Max. OE=GND
Symmetry SYM 40% to 60% 45% to 55% f0 ≤ 125MHz 50% VCC level, L_CMOS ≤ Max.
40% to 60% f0 > 125MHz
Output voltage VOH VCC-0.35V Min E:IOH = -6mA /
C,D:IOH = -8mA
VOL 0.35V Max. E:IOL = 6mA /
C,D:IOL = 8mA
Output load condition
L_CMOS 15pF Max.
Input voltage VIH 70% VCC Min. OE terminal
VIL 30% VCC Max.
Rise time
/Fall time
tr / tf 2ns Max. Between 20% VCC
and 80% VCC level,
L_CMOS ≤ Max.
Start-up time t_str 10ms Max. Time at minimum supply voltage to be 0s
Jitter *3 tRMS 3ps Typ. σ (RMS of total distribution)
tp-p 25ps Typ. Peak to Peak
f_aging ±5 × 10-6 / year Max. +25°C,First year,

*1 Please contact us for inquiries regarding non-standard frequencies.
*2 This includes initial frequency tolerance, temperature variation, supply voltage variation and load variation.
*3 Based on DTS-2075 Digital timing system made from WAVECREST with jitter analysis software VISI6.

Product name (Standard form)

External dimensions

(Unit: mm)

OE pin = HIGH : Specified frequency output.
OE pin = LOW : Output is high impedance

Footprint (Recommended)

(Unit: mm)

To maintain stable operation, provide a 0.01 µF to 0.1 µF by-pass capacitor at a location as near as possible to the power source terminal of the crystal product (between VCC - GND).