Low-Jitter SAW Oscillator
Epson's SAW oscillator has performance of "high frequency" and "low jitter characteristic" required by high-speed serial communication. SAW oscillator contains a SAW resonator more than 100MHz and operates at the steady fundamental oscillation. In addition, it supports the various output type and supply voltage.
- Products lineup
- Type of the oscillator and jitter performance
- Example of jitter and phase noise characteristic of SAW oscillator
- Jitter to affect BER(Bit Error Rate)
- Notes for SAW oscillator user
|Product name||Nominal frequency range||Supply voltage||Output||Package size[mm]|
|XG-1000CB||50 MHz?~ 170 MHz||1.8 V, 2.5 V, 3.3 V||CMOS||5×3.2×1.1t|
|XG-1000CA||50 MHz?~ 170 MHz||1.8 V, 2.5 V, 3.3 V||CMOS||7×5×1.2t|
|EG-2021CA||62.5 MHz?~ 250 MHz||2.5 V||CMOS||7×5×1.2t|
|EG-2001CA||106.25 MHz?~ 170 MHz||3.3 V||CMOS||7×5×1.2t|
|EG-2002CA||62.5 MHz?~ 170 MHz||3.3 V||LV-TTL||7×5×1.2t|
|EG-2121CA||53.125 MHz?~ 700 MHz||2.5 V||Differential LV-PECL/
|EG-2102CA||53.125 MHz?~ 700 MHz||3.3 V||Differential LV-PECL/
|EG-2101CA||62.5 MHz?~ 99.999 MHz||2.5 V||Differential LV-PECL||7×5×1.2t|
|EG-4101CA||100 MHz?~ 625 MHz||3.3 V||Differential LV-PECL/
|EG-4121CA||100 MHz?~ 500 MHz||2.5 V||Differential LV-PECL/
Type of the oscillator and Jitter performance
There are various oscillators besides the SAW oscillator and the jitter performance that controls the performance of FPGA depends on the type of the oscillator.
Our company is recommending the SAW oscillator that shows low jitter characteristics in consideration of the FPGA operation stability.
|Type||Resonator (Oscillation frequency)||Oscillation circuit||Multiple circuit (Circuit that raises output frequency)||Jitter performance|
|SAW oscillator||SAW resonator (100 to 2000MHz)||Fundamental / high frequency oscillation (High drive)||Not use||Excellent The noise floor is a low because of the high drive operation, and the high frequency is a steady fundamental oscillation.|
|Crystal oscillator (Fundamental)||Crystal unit (AT)
(5 to 250MHz)
|Fundamental / high frequency oscillation (Low drive)||Not use||Excellent Q value of the AT crystal unit is high and a fundamental oscillation though the noise floor goes up more than the SAW oscillator due to the lower drive level.|
|Crystal unit (AT)
(50 to 170MHz)
|Overtone / high frequency oscillation (Low drive and fundamental suppression)||Not use||Good The oscillation stability is inferior to two above-mentioned methods because the fundamental oscillation is suppressed and overtone is oscillated.|
|Crystal oscillator (PLL multiple)||Crystal unit (AT)
(20 to 50MHz)
|Fundamental / low frequency oscillation (Low drive)||PLL||Poor The noise floor is greatly deteriorated because of PLL multiple. The sub-harmonic by the oscillation frequency is superimposed.|
|Crystal oscillator (Analog multiple)||Crystal unit (AT)
(50 to 250MHz)
|Fundamental / low frequency oscillation (Low drive)||Multiplier (filtering output harmonics)||Good Some noise floors are deteriorated, because of C/N of the harmonics. The sub-harmonic influences it just like PLL.|
|MEMS oscillator||MEMS resonator (5 to 50MHz)||Fundamental / low frequency oscillation (Temperature compensate)||PLL||Poor PLL and the sub-harmonic influence the jitter. Q value of the MEMS oscillator is low, and it deteriorates the jitter.|
Example of jitter and phase noise characteristics of SAW oscillator
The example of the characteristic is shown in the following.
Histogram of jitter is narrow, and our product almost shows Gaussian distribution. There is no DJ (Deterministic jitter), and RJ (Random jitter) can be said to be a very small characteristic by this data.
Phase noise characteristic
The jitter shows the variation of the cycle in the time-domain. In the frequency-domain, the jitter appears as the variation of the frequency, and it is evaluated as a phase noise. Our SAW oscillator has low jitter and low phase noise characteristic.
Jitter to affect BER (Bit Error Rate)
Securing the timing margin becomes difficult to handle the signal of the GHz band in a high-speed transceiver of FPGA, and the clock quality influences BER strongly. BER grows by fluctuation among clock cycles (jitter) large. The relation between the jitter and BER is shown in the bathtub curve. The margin can be secured by large the eye opening (=small jitter) by necessary BER.
Notes for SAW oscillator user
For SAW oscillator performance, please keep the following notes.
|1||This device contains a SAW resonator, so please do not expose to excessive shock or vibration.||SAW resonator in this device might be broken.|
|2||Ultrasonic cleaning can be used on this product, however, since the oscillator might be damaged under some conditions, please exercise caution in advance.||SAW resonator or wire in this device might be broken.|
|3||An automatic insertion is available, however, the internal SAW resonator might be damaged in case that too much shock or vibration is produced mechanically. Be sure to check your machine condition in advance.||SAW resonator in this device might be broken.|
|4||This device is made with C-MOS IC. Please take necessary precautions to prevent damage due to Electrical Static Discharge (ESD).||IC in this device might be broken.|
|5||We recommend placing a 0.01 mF to 0.1 mF capacitor closely between Vcc and GND to obtain stable operation and protect against power line ripple.||There might be jitter characteristic deterioration by a power supply ripple/noise. Please refer to “Jitter to affect BER”|
|6||Vcc and GND pattern shall be as large as possible so that high frequency impedance shall be small.||Ripple/noise occurs to power supply, and there might be electrical characteristic deterioration.|
|7||The metal lid is connected to GND #3 pin. Please take necessary precautions to prevent short circuit to GND by contact with the metal cap.||The circuit might be short when coming in contact with a metallic cap.|
|8||Start up time (0 to 90% Vcc) of power source should be more than 150 ms and slew rate should be less than 19.8 mV/ms. We don’t recommend to power on from an intermediate electric voltage or extreme fast power on. These powering conditions may cause no oscillation or abnormal oscillation.||The oscillation might not begin when start up time of power source is too high a speed.|
|9||Please design the output lines by differential impedance 100 ohm and try to make the output lines as short as possible. A long output line may cause irregular output.||Long output lines cause wave reflection and irregular output. Please refer to “Interfacing a SAW oscillator to a FPGA transceiver reference clock input “|
|10||Other high level signal lines may cause incorrect operation, so please do not place high-level signal line close to this device.||It might be influenced by the noise of the signal wire or a normal oscillation dose not start.|
|11||We recommend to use and store under room temperature and normal humidity to insure frequency accuracy and prevent moisture.||Under the high temperature environment, aging might accelerate. Moreover, the oscillator circuit might short by dew condensation.|
|12||When not using the OE pin connection, please connect to Vcc. We recommend installation of a resistor in between OE and Vcc to mitigate effect by a surge etc||IC in this device might be broken.|
|13||When distributing output signals, please use the clock divider IC (LVDS fanout buffer).||Distributing output signals causes wave reflection and irregular output. Please refer to “Interfacing a SAW oscillator to a FPGA transceiver reference clock input “|
|14||DUT’s surface temperature may rise from surrounding temperature by self heat-generation. Please confirm a rise in temperature with DUT mounted to an actual substrate, because it may change from the mounting condition.||This device experiences a higher temperature than the specification. There might be electrical characteristic deterioration.|
|15||Recommendation reflow times are less than 2 times. In case this device is reflow soldered on the back side of your circuit board, please carefully verify the device is properly secured to prevent coming detached from card.||Frequency might change by the heat of reflow. The device might be detached, when the device is reflow soldered on the back side of the board.|