SG-211SEE (Crystal Oscillator Low Profile / High Stability SPXO)

  • Frequency range
    2.375MHz to 60.000MHz
  • Supply voltage
    1.8V Typ.
  • Current consumption
    1.2mA Typ.
    (SEE: 1.8V No load condition 40MHz)
  • Function
  • External dimensions
    2.5 × 2.0 × 0.7mm

pb free

RoHS Compliant



Item Symbol Specifications Condition/Remarks
Output frequency range f0 2.375MHz to 60.000MHz Please contact us for inquiries regarding the available frequencies.
Supply voltage VCC 1.8V Typ.
1.6V to 2.2V
2.5V Typ.
2.2V to 2.7V
3.3V Typ.
2.7V to 3.6V
Storage temperature range T_stg -40°C to +125°C Store as bare product.
Operating temperature range T_use -40°C to +90°C
Frequency tolerance ※ f_tol D: ±20 × 10-6
E: ±15 × 10-6
-20°C to +70°C VCC ±10%
Included in reflow drift
H: ±20 × 10-6
T: ±15 × 10-6
-40°C to +85°C
a: ±15 × 10-6
b: ±20 × 10-6
d: ±25 × 10-6
-40°C to +90°C
Current consumption ICC 2.3mA Max. 2.5mA Max. 3.5mA Max. No load condition,
2.375MHz ≦ f0 ≦ 32MHz
2.8mA Max. 3.0mA Max. 4.0mA Max. No load condition,
32MHz < f0 ≦ 40MHz
3.3mA Max. 3.5mA Max. 4.5mA Max. No load condition,
40MHz < f0 ≦ 48MHz
4.5mA Max. 5.0mA Max. 6.0mA Max. No load condition,
48MHz < f0 ≦ 60MHz
Stand-by current I_std 5.0µA Max. ST
Symmetry SYM 45% to 55% 50% VCC level,
L_CMOS ≦ 15pF
Output voltage VOH 90% VCC Min. IOH= -4mA
VOL 10% VCC Max. IOL= 4mA
Output loadcondition
L_CMOS 15pF Max.
Input voltage VIH 80% VCC Min. ST
VIL 20% VCC Max.
Rise time / Fall time tr / tf 4.5ns Max. 20% VCC to 80% VCC level,
L_CMOS = 15pF
Start-up time t_str 5ms Max. t = 0 at 90% VCC
Frequency aging f_aging This is included in frequency tolerance specification. +25°C , First year

※ Please contact us for inquiries regarding available frequency tolerance.

Product name (Standard form)

External dimensions

(Unit: mm)

ST pin = HIGH or "open" : Specified frequency output.
ST pin = LOW : Output is high impedance, oscillation stops.

Footprint (Recommended)

(Unit: mm)

To maintain stable operation, provide a 0.01uF to 0.1uF by-pass capacitor at a location as near as possible to the power source terminal of the crystal product (between Vcc - GND).

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