VG-4512CA (Voltage -Controlled Crystal Oscillator (VCXO))
VG-4512CA
- Frequency range
80MHz to 200MHz - Supply voltage
3.3V - Absolute pull range
±50 × 10-6
±100 × 10-6 - External dimensions
7.0 × 5.0 × 1.6mm - Function
Output enable (OE)
Active High or Low - Output
LV-PECL
Specifications
| Item | Symbol | Specifications | Conditions/Remarks |
|---|---|---|---|
| Output frequency range | f0 | 80.000MHz to 200.000MHz | Please contact us for inquiries regarding available frequencies. |
| Supply voltage | VCC | C : 3.3V ±0.165V | |
| Storage temperature | T_stg | -55°C to +125°C | Storage as single product. |
| Operating temperature | T_use | G : -40°C to +85°C J : -20°C to +70°C K : 0°C to +70°C |
|
| Frequency tolerance | f_tol | ±50 × 10-6 Max. | Includes frequency aging (20years) |
| Current consumption | ICC | 60mA Max. | 50Ω |
| Absolute pull range *1 | APR | H : ±100 × 10-6 Min. G : ±50 × 10-6 Min. |
VC= 1.65V ±1.50V |
| Input resistance | Rin | 100kΩ Min. | DC level |
| Frequency change polarity | - | Positive slope | VC = 0.15 to 3.15V |
| Symmetry | SYM | 45% to 55% | VCC = 1.3V, VC = 1/2VCC |
| Output voltage | VOH | VCC - 1.1V Min. | |
| VOL | VCC - 1.5V Max. | ||
| Output load condition (ECL) | L_ECL | LV-PECL | |
| Input voltage | VIH | 70% VCC Min. | |
| VIL | 30% VCC Max. | ||
| Rise time / Fall time | tr / tf | 1.0ns Max. | 20% to 80% (VOH- VOL) |
| Start-up time | t_str | 10ms Max. | Time at minimum supply voltage to be 0s |
| Frequency aging | f_aging | This is included frequency tolerance | +25°C, VCC = 3.3V, 20 years |
*1 Absolute pull range = Frequency control range - Frequency tolerance
* Please keep VC pin open or ground while powering up VCC.
External dimensions
(Unit: mm)
Note.
• Active High
OE pin = "H" or "open" : Specified frequency output.
OE pin = "L" : Output is high impedance, oscillation stops.
• Active Low
OE pin = "L" or "open" : Specified frequency output.
OE pin = "H" : Output is high impedance, oscillation stops.
Footprint (Recommended)
(Unit: mm)
To maintain stable operation, provide a 0.01μF to 0.1uF by-pass capacitor at a location as near as possible to the power source terminal of the crystal product (between Vcc - GND).
